The present invention relates to a leadframe for mounting a semiconductor chip, a semiconductor integrated circuit device using the same, and a method of and process for fabricating the two. More particularly, the present invention relates to a technology which is effective when applied for standardizing the leadframe and for improving the reflow cracking resistance of an LSI package.
The resin body, i.e., LSI package of a surface mounting type resin molded device (or surface mount device) such as a QFP (i.e., Quad Flat Package) has an important target of suppressing the package cracking (i.e., resin body cracking) in a reflow soldering step.
In case the resin body (i.e., plastic body) of the LSI package absorbs moisture, the interface between the resin and a die pad will peel due to the internal stress which is caused by the high temperature at the reflow soldering step for heating the LSI package in its entirety. This package cracking is a phenomenon the peeling is enlarged by the expansion of the moisture condensed at the die pad interface, i.e., the water vapor pressure to crack the resin body. This phenomenon causes the deterioration of moisture resistance and an insufficient soldering due to the bulging of the package body. If this package cracking takes place on the face of the semiconductor chip, it will cause a serious defect such as the breakage of wires.
As the existing counter-measures for preventing the peel of the interface between the resin and the die pad, there is known either a method (as disclosed in Japanese Patent laid-Open No. 83961/1990), in which the die pad is partially formed with through holes so that the back of the semiconductor chip and the resin may be held in close contact through those through holes, or a method in which the adhesion between the resin and the die pad is improved by dimpling the back face of the die pad.
On the other hand, even the chips having an equal pin number but different sizes, e.g., an ASIC (i.e., Application Specific Integrated Circuit) having a small production number for one kind are required to be capable of packaging density and it is a tendency that the chip is mounted on the surface mounted LSI package such as the aforementioned QFP. In the prior art, therefore, the products have been manufactured by fabricating a leadframe according to the chip size so that their production cost are raised.
As the leadframe capable of corresponding to the ASIC of various chip sizes but a small production number, therefore, there is disclosed on pp. 76 to 78 of “Nikkei MICRODEVICES, December, 1987” a leadframe, in which a semiconductor chip is mounted on a tape of a polyimide resin attached as the die pad to the inner leads.